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Posts Tagged 'Data Center'

  • August 25, 2026

    Marvell Structera™ X, A and S: A Comprehensive CXL Portfolio Powering AI Memory Innovation

    By Khurram Malik, AVP, Data Center Memory and Storage Solutions, Marvell

    CXL has become one of the most important technologies shaping AI infrastructure. As hyperscalers race to deploy larger AI models, longer context windows and increasingly memory-intensive inference workloads, memory capacity and bandwidth have emerged as critical constraints on performance, efficiency and scaling. At the same time, CXL adoption is reaching an inflection point, moving from evaluation into real-world deployment across hyperscale environments.

    Marvell is leading this transition with Structera™ X memory expansion solutions developed alongside the world’s leading hyperscalers. The story begins with the shipping of Structera X 2404 and 2504 platforms, which have enabled hyperscalers to expand memory resources more efficiently, including extending the useful life of existing DDR4 investments while powering demanding AI workloads.

    Structera X is not a series of disconnected product eras—it is a single, continuous architectural evolution. Today’s generation is already delivering real hyperscaler deployments, ecosystem maturity and a compelling TCO advantage. From that foundation, Marvell is extending the architecture toward the next phase of AI infrastructure innovation, adding capabilities enabled by the evolving CXL 3.2 ecosystem, PCIe Gen 6 connectivity and more advanced multi-host memory sharing architectures. These advancements will create larger, more flexible memory pools, enabling more efficient sharing of resources across servers and improving infrastructure utilization at hyperscale. As the architecture advances, Marvell is driving it toward higher bandwidth, deeper data optimization and increasingly disaggregated memory environments built to meet the growing demands of AI workloads.

    Why does this matter for hyperscalers?

    AI infrastructure economics are increasingly determined by how efficiently memory can be deployed, shared and utilized. Memory stranded behind individual servers reduces overall infrastructure efficiency, while shortages of next-generation memory can slow expansion plans. CXL provides a path to disaggregate and optimize memory resources at scale, improving utilization and maximizing the value of existing investments.

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  • June 24, 2026

    Structera X and A CXL Compression: Making Every Gigabyte Count

    By Arifur Rahman, Director of Product Marketing, Custom Cloud Solutions, Marvell

    Modern AI workloads are insatiable consumers of memory. Deep learning recommendation models (DLRM), large language model (LLM) inference, in-memory databases and vector search engines all share a common bottleneck: there is never enough DRAM, and what exists is very expensive.

    At today's spot prices—$27–$37 per GB for server-grade DDR5 RDIMMs1—a 12TB memory pool requires nearly half a million dollars in DRAM alone. Meanwhile, AI infrastructure buildouts are consuming server DRAM capacity faster than fabs can produce it, driving prices up 300–400% since mid-2025.1, 2

    CXL memory expansion was supposed to solve this. And it does—but there's a subtler lever that most solutions ignore: the data sitting in that memory is compressible, and most CXL controllers don't touch it.

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  • June 17, 2026

    Plasmonics: A Path to Higher Bandwidth in Optics in the AI Era

    By Claudia Hoessbacher, Senior Director, and Wolfgang Heni, Director, Optical Engineering, Marvell

    Plasmons have been used to accelerate drug discovery, enhance the sensitivity of sensors and even create artistic treasures in the Roman era.

    Ongoing research at Marvell seeks to harness them to improve the performance of optical networks for the AI era. Plasmonics, a technology that leverages the properties of surface plasmon polaritons (SPPs), provides a promising pathway for enhancing the roadmap of silicon photonic (SiPho) light engines, a critical component inside optical modules.

    Plasmonic-based SiPho light engines could support modules operating at 3.2T and beyond while consuming a fraction of the space and power per bit of modules based on existing technologies. Manufacturers could leverage foundry process technologies for scaling production.

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  • May 28, 2026

    Open CPX Sets the Stage for More Flexible, Scalable Connectivity

    By George Hervey, Associate Vice President, Cloud Switch Marketing, Marvell

    Co-packaged connectivity is coming. The Open CPX MSA (Co-packaging Multisource Agreement) is working to simplify adoption.

    The consortium, which includes Marvell and other leaders in connectivity, is developing specifications and standards for solutions for integrating near-packaged optical (NPO) and/or co-packaged optical (CPO) technology into switches and servers in scalable, repeatable ways. Members are also working to support interoperability with co-packaged copper (CPC).

    The idea is to give data center service providers, equipment manufacturers and others a unified framework for next-generation connectivity to accelerate innovation and meet the surging demand for these technologies. Fewer than one million near- and co-packaged ports shipped in 2025, according to LightCounting; by 2030, shipments are projected to surpass 100 million ports per year.1 Standards that can ensure predictability and flexibility will be critical in enabling this expected growth.

    “The initial target of the MSA will be to develop an optimized optical engine with a defined pluggable socket and electrical connector system supporting high speed and high-density connectivity between a switch or processor and co-packaged and near-package interconnects,” the Open CPX MSA website states. “The specifications will define connector mechanicals, thermals, electrical pinout, mechanical form factors, electrical, optical, and management interface specifications to ensure interoperability between multiple vendors of Open CPX.”

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  • June 13, 2023

    FC-NVMe Goes Mainstream for Next-Generation Block Storage from HPE

    By Todd Owens, Field Marketing Director, Marvell

    While Fibre Channel (FC) has been around for a couple of decades now, the Fibre Channel industry continues to develop the technology in ways that keep it in the forefront of the data center for shared storage connectivity. Always a reliable technology, continued innovations in performance, security and manageability have made Fibre Channel I/O the go-to connectivity option for business-critical applications that leverage the most advanced shared storage arrays.

    A recent development that highlights the progress and significance of Fibre Channel is Hewlett Packard Enterprise’s (HPE) recent announcement of their latest offering in their Storage as a Service (SaaS) lineup with 32Gb Fibre Channel connectivity. HPE GreenLake for Block Storage MP powered by HPE Alletra Storage MP hardware features a next-generation platform connected to the storage area network (SAN) using either traditional SCSI-based FC or NVMe over FC connectivity. This innovative solution not only provides customers with highly scalable capabilities but also delivers cloud-like management, allowing HPE customers to consume block storage any way they desire – own and manage, outsource management, or consume on demand.HPE GreenLake for Block Storage powered by Alletra Storage MP

    At launch, HPE is providing FC connectivity for this storage system to the host servers and supporting both FC-SCSI and native FC-NVMe. HPE plans to provide additional connectivity options in the future, but the fact they prioritized FC connectivity speaks volumes of the customer demand for mature, reliable, and low latency FC technology.

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