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Posts Tagged 'SmartNICs hardware accelerators'

  • February 24, 2022

    No-Compromise 5G Open RAN: Compute Architecture

    By Peter Carson, Senior Director Solutions Marketing, Marvell

    Introduction 

    5G networks are evolving to a cloud-native architecture with Open RAN at the center. This explainer series is aimed at de-mystifying the challenges and complexity in scaling these emerging open and virtualized radio access networks. Let’s start with the compute architecture.

    The Problem 

    Open RAN systems based on legacy compute architectures utilize an excessively high number of CPU cores and energy to support 5G Layer 1 (L1) and other data-centric processing, like security, networking and storage virtualization. As illustrated in the diagram below, this leaves very few host compute resources available for the tasks the server was originally designed to support. These systems typically offload a small subset of 5G L1 functions, such as forward error correction (FEC), from the host to an external FPGA-based accelerator but execute the processing offline. This kind of look-aside (offline) processing of time-critical L1 functions outside the data path adds latency that degrades system performance.Limitations of Open RAN systems based on general purpose processors

    Image:  Limitations of Open RAN systems based on general purpose processors

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